Method for fabricating semiconductor structures including a high resistivity layer, and related semiconductor structures
US10276492B2 · kind B2 · utility
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13Claims
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Key dates
| Filing date | Jan 13, 2017 |
| Grant date | Apr 30, 2019 |
| Priority date | — |
| Expiry date | Jan 13, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/6616
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of forming a semiconductor structure include forming a device layer on an initial substrate, attaching a first surface of the device layer to a temporary substrate and forming a high resistivity layer on a second surface of the device layer by removing a portion of the initial substrate. Methods further include attaching a final substrate to the high resistivity layer and removing the temporary substrate. Semiconductor structures are fabricated by such methods that include a final substrate, a high resistivity layer disposed over the final substrate and a device layer disposed over the high resistivity layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.