Semicondcutor device package and method of forming semicondcutor device package
US10276543B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2017 |
| Grant date | Apr 30, 2019 |
| Priority date | — |
| Expiry date | Oct 27, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06548
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device package includes a lower redistribution structure, an upper encapsulated semiconductor device and an upper redistribution structure. The lower redistribution structure includes a first dielectric layer, a RDL, a second dielectric layer, and a second RDL. The first RDL is disposed on the first dielectric layer and includes a circuit portion and an alignment mark portion insulated from the circuit portion. The second dielectric layer is disposed on the first RDL, wherein the second dielectric layer covers the alignment mark portion. The second RDL is disposed on the second dielectric layer and electrically connected to the first RDL. The upper encapsulated semiconductor device is disposed on the lower redistribution structure. The upper redistribution structure is disposed on the upper encapsulated semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.