Isolation structure for active devices
US10276657B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2017 |
| Grant date | Apr 30, 2019 |
| Priority date | — |
| Expiry date | Sep 13, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An isolation structure for active devices is provided. In some embodiments, the isolation structure is used in a transistor. The transistore includes a substrate having a first doping type. The transistor also includes a channel layer positioned over the substrate and comprising a first section and a second section. The transistor further includes an active layer positioned over the channel layer. The isolation structure includes a horizontal segment, a first vertical segment, and a second vertical segment. The horizontal segment is arranged below the second section of the channel layer and continuously extends between the first vertical segment and the second vertical segment. The isolation structure has a second doping type that is different than the first doping type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.