Systems and methods for on-wafer dynamic testing of electronic devices
US10281518B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2015 |
| Grant date | May 7, 2019 |
| Priority date | — |
| Expiry date | Aug 14, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2889
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Systems and methods for on-wafer dynamic testing of electronic devices. The systems include a probe head assembly, a probe-side contacting structure, a chuck, and a chuck-side contacting structure. The probe head assembly includes a probe configured to electrically contact a first side of a device under test (DUT). The probe-side contacting structure includes a probe-side contacting region. The chuck includes an electrically conductive support surface configured to support a substrate that includes the DUT and to electrically contact a second side of the DUT. The probe head assembly and the chuck are configured to translate relative to one another to selectively establish electrical contact between the probe and the DUT. The chuck-side contacting structure includes a chuck-side contacting region that is in electrical communication with the electrically conductive support surface and opposed to the probe-side contacting structure. The methods may include methods of operating the system or systems.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.