Method and apparatus for execution of threads on processing slices using a history buffer for restoring architected register data via issued instructions
US10282205B2 · kind B2 · utility
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Key dates
| Filing date | Oct 14, 2015 |
| Grant date | May 7, 2019 |
| Priority date | — |
| Expiry date | Sep 27, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method and system for restoring data to a register file of a processing unit are provided. A history buffer entry (HBE) is marked for restoration to a register file entry. Result data and control information is sent from the HBE to an Issue Queue (ISQ). The ISQ issues an instruction for loading the result data into the register file entry based on the control information. A write back operation is performed to restore the result data to the register file entry, in response to issuing of the instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.