Wafer and lot based hierarchical method combining customized metrics with a global classification methodology to monitor process tool condition at extremely high throughput
US10290088B2 · kind B2 · utility
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19Claims
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Key dates
| Filing date | Mar 13, 2014 |
| Grant date | May 14, 2019 |
| Priority date | — |
| Expiry date | Sep 24, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods and systems for monitoring process tool conditions are disclosed. The method combines single wafer, multiple wafers within a single lot and multiple lot information together statistically as input to a custom classification engine that can consume single or multiple scan, channel, wafer and lot to determine process tool status.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.