Three-dimensional memory device containing air gap rails and method of making thereof
US10290648B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2017 |
| Grant date | May 14, 2019 |
| Priority date | — |
| Expiry date | Dec 7, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/10
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An alternating stack of insulating layers and spacer material layers located over a substrate. The spacer material layers are formed as, or are subsequently replaced with, electrically conductive layers. Memory stack structures are formed through the alternating stack. After formation of a backside trench, electrically-conductive-layer-level recessed cavities are formed by laterally recessing the electrically conductive layers around the backside trench. Electrically conductive rails are formed on remaining portions of the electrically conductive layers by selective deposition of a conductive material. Insulating-layer-level recessed cavities are formed by laterally recessing the insulating layers around the backside trench. A continuous insulating material layer can be formed in the insulating-layer-level recessed cavities with air gap rails cavities to reduce capacitive coupling among the electrically conducive rails.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.