Patent · US Active

Semiconductor device and fabrication method thereof

US10297454B2 · kind B2 · utility

0Cited by
4References
20Claims
0Family size

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Key dates

Filing dateOct 27, 2016
Grant dateMay 21, 2019
Priority date
Expiry dateOct 27, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/038
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method is provided for fabricating a semiconductor device. The method includes providing a base substrate including a dummy gate electrode and an interlayer dielectric layer covering a sidewall of the dummy gate electrode. The method also includes forming a sacrificial layer covering a top surface of the interlayer dielectric layer by using a selective atomic layer deposition process, wherein the sacrificial layer exposes a top surface of the dummy gate electrode. In addition, the method includes forming an opening by using the sacrificial layer as an etch mask to remove the dummy gate electrode, and forming a metal gate electrode on the sacrificial layer and in the opening. Further, the method includes planarizing the metal gate electrode and the sacrificial layer until a top surface of the metal gate electrode is leveled with the top surface of the interlayer dielectric layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.