Memory device
US10297641B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2016 |
| Grant date | May 21, 2019 |
| Priority date | — |
| Expiry date | Sep 13, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
Abstract
A memory device, containing a first electrode, a second electrode and an oxide layer arranged between the first electrode and the second electrode, is produced. The oxide layer has a first zone and a second zone, with the first zone surrounding or being located on either side of the second zone, with the minimum distance d2 separating the two electrodes on the second zone of the oxide layer being less than the minimum distance d1 separating the two electrodes on the first zone of the oxide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.