Differential offset calibration of chopping switches in time-interleaved analog-to-digital converters
US10298248B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2018 |
| Grant date | May 21, 2019 |
| Priority date | — |
| Expiry date | Mar 5, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1205
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An example apparatus for analog-to-digital conversion includes a plurality of channels each including an analog-to-digital converter (ADC), a switch configured to couple a differential input to the ADC, a first offset calibration circuit coupled to an output of the ADC, a multiplier coupled to an output of the first offset calibration circuit, a second offset calibration circuit coupled to an output of the multiplier, and a pseudorandom bit sequence (PRBS) generator coupled to the switch and the multiplier. The apparatus further includes a gain calibration circuit coupled to an output of the second offset calibration circuit in each of the plurality of channels; and a time-skew calibration circuit coupled to an output of the gain calibration circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.