Apparatus and method for checking output data during redundant execution of instructions
US10303566B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2017 |
| Grant date | May 28, 2019 |
| Priority date | — |
| Expiry date | Nov 21, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/82
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method are provided for checking output data during redundant execution of instructions. The apparatus has first processing circuitry for executing a sequence of instructions and second processing circuitry for redundantly executing the sequence of instructions. Error code generation circuitry is used to generate an error code from the first output data generated by the first processing circuitry. Error checking circuitry then uses that error code to perform an error checking operation on redundant output data from the second processing circuitry. As a result of the error checking operation, the error checking circuitry then generates a comparison indication signal to indicate that the first output data differs from the redundant output data when the error checking operation detects an error. This provides a very efficient mechanism for implicitly comparing the output data from the first processing circuitry and the second processing circuitry during redundant execution.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.