Semiconductor memory device for improving high temperature data retention
US10304543B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 2, 2017 |
| Grant date | May 28, 2019 |
| Priority date | — |
| Expiry date | Aug 2, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3459
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device improving a high-temperature data retention is provided. Here, a flash memory includes an erasing element erasing a selected storage cell in a storage cell array. The erasing element further includes an applying element, a verifying element, and a decision element. The applying element applies a monitoring erasing pulse to a monitoring storage cell before starting an erasing operation for selecting the storage cell. The verifying element performs a verification of the monitoring storage cell to which the monitoring erasing pulse is applied. The decision element detennines ISPE conditions based on a verification result of the verifying element. The erasing element erases the storage cell according to the determined ISPE conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.