Semiconductor device including stacked die with continuous integral via holes
US10304816B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2016 |
| Grant date | May 28, 2019 |
| Priority date | — |
| Expiry date | Dec 30, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06582
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device and a fabricating method of semiconductor device are disclosed. The semiconductor device includes: a substrate having a bonding pad on a surface of the substrate; at least two semiconductor components each having a first surface and a second surface opposite the first surface, the semiconductor components stacked on top of each other on the surface of the substrate via a layer of component attach material attached on the second surface of the respective semiconductor component; an integral through via hole extending completely through the semiconductor components and the layers of component attach material and having a substantially uniform diameter along an extending direction of the integral through via hole aligned with the bonding pad on the surface of the substrate, and a continuous conductive material filled in the integral through via hole and in physical and electrical contact with the bonding pad of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.