Circuit for recovering from power loss and electronic device using the same circuit and method thereof
US10305470B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2018 |
| Grant date | May 28, 2019 |
| Priority date | — |
| Expiry date | Jul 9, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/20
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In an aspect, the disclosure is directed to a circuit which includes not limited to a memory circuit which includes a first memory element outputting a first memory output voltage and a second memory element outputting a second memory output voltage; a logical comparator circuit which is connected to the memory circuit and includes a first logical comparator which compares the first memory output voltage with a first power supply voltage to generate a first logical comparator output voltage and a second logical comparator which compares the second memory output voltage with a second power supply voltage to generate a second logical comparator output voltage; and a logical circuit which is electronically connected to the logical comparator circuit and receives a first logical comparator output voltage and a second logical comparator output voltage to perform a first logical operation which is used at least in part to generate a power on reset voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.