Reconfigurable processor and timing control method thereof
US10311017B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2018 |
| Grant date | Jun 4, 2019 |
| Priority date | — |
| Expiry date | Mar 15, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7871
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a reconfigurable processor and a timing control method thereof. The reconfigurable processor comprises a reconfigurable cell array (RCA) including a plurality of reconfigurable cells (RCs) and a control unit; the control unit is configured to generate and send a timing control information to the RCA; and the RCA is configured to execute an operation task according to the timing control information, wherein the RC in the RCA starts to execute an operation when receiving the timing control information, and delivers the timing control information to a next level of RC within the RCA according to a preset order after the operation is completed; and when the RCA completes the operation task corresponding to the timing control information, the RCA destroys the timing control information, wherein the operation task includes operations executed by each level of the RCs receiving the timing control information. According to embodiments of the present disclosure, the operation efficiency of the RCA is improved, thereby optimizing the performance of the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.