Apparatuses and methods for input signal receiver circuits
US10311941B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 10, 2018 |
| Grant date | Jun 4, 2019 |
| Priority date | — |
| Expiry date | Apr 10, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45111
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatuses and methods for input signal receiver circuits are disclosed. An example apparatus includes an amplifier stage configured to receive a reference voltage and an input signal. The amplifier stage is configured to provide in a first mode a first output having a complementary logic level to the input signal and a second output having a same logic level to the input signal and is further configured to provide in a second mode the first output unrelated to the input signal and the second output having a same logic level to the input signal. The example apparatus further includes a pull-up circuit and a pull-down circuit. The pull-up circuit is configured to provide a high logic level voltage to a common node when activated by the first output. The pull-down circuit is configured to provide a low logic level voltage to the common node when activated by the second output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.