Integrated circuit device and method of manufacturing the same
US10312341B2 · kind B2 · utility
0Cited by
7References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2017 |
| Grant date | Jun 4, 2019 |
| Priority date | — |
| Expiry date | Dec 9, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/853
Abstract
An integrated circuit device includes a first gate stack formed on a first high dielectric layer and comprising a first work function adjustment metal containing structure and a second gate stack formed on a second high dielectric layer and comprising a second work function adjustment metal containing structure having an oxygen content that is greater than that of the first work function adjustment metal containing structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.