Method for making thin film transistor
US10312354B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 22, 2017 |
| Grant date | Jun 4, 2019 |
| Priority date | — |
| Expiry date | Dec 22, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K85/221
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of making a thin film transistor, the method including: forming a gate insulating layer on a gate electrode; placing a semiconductor layer on the gate insulating layer; locating a first photoresist layer, a nanowire structure, a second photoresist layer on the semiconductor layer, the nanowire structure being sandwiched between the first photoresist layer and the second photoresist layer, wherein the nanowire structure comprises one nanowire; forming one opening in the first photoresist layer and the second photoresist layer to form an exposed surface, wherein a part of the nanowire is exposed in the opening; depositing a conductive film layer on the exposed surface of the semiconductor layer, wherein the conductive film layer defines a nano-scaled channel corresponding to the nanowire, the conductive film layer is divided into two regions, one region is used as a source electrode, the other region is used as a drain electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.