Method for manufacturing semiconductor structure
US10319644B2 · kind B2 · utility
1Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2017 |
| Grant date | Jun 11, 2019 |
| Priority date | — |
| Expiry date | Mar 16, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In some embodiments, a semiconductor structure includes a first device and a second device. The first device has a first surface. The first device includes a first active region defined by a first material system. The second device has a second surface. The second surface is coplanar with the first surface. The second device includes a second active region defined by a second material system. The second material system is different from the first material system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.