Semiconductor package having redistribution pattern and passivation patterns and method of fabricating the same
US10319650B2 · kind B2 · utility
2Cited by
5References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 24, 2017 |
| Grant date | Jun 11, 2019 |
| Priority date | — |
| Expiry date | May 24, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package including a redistribution substrate, and a semiconductor chip mounted on the redistribution substrate, the semiconductor chip having a conductive pad on one surface thereof may be provided. The redistribution substrate may include a first passivation pattern on the conductive pad, the first passivation pattern exposing a portion of the conductive pad, and a redistribution pattern covering the portion of the conductive pad exposed by the first passivation pattern and surrounding the first passivation pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.