Generation of fast frequency ramps

US10320402B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Rainer Stuhlberger · Puchenau, AT
• Lukas Heschl · Linz, AT

Key dates

• Filing date: Dec 15, 2017
• Grant date: Jun 11, 2019
• Expiry date: Dec 15, 2037

Classification

• Technology area (CPC G): Physics
• CPC primary: G01S2013/9321
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A circuit includes an RF oscillator coupled in a phase-locked loop. The phase-locked loop is configured to receive a digital input signal, which is a sequence of digital words, and to generate a feedback signal for the RF oscillator based on the digital input signal. The circuit further includes a digital-to-analog conversion unit that includes a pre-processing stage configured to pre-process the sequence of digital words and a digital-to-analog-converter configured to convert the pre-processed sequence of digital words into the analog output signal. The circuit includes circuitry configured to combine the analog output signal and the feedback signal to generate a control signal for the RF oscillator. The pre-processing stage includes a word-length adaption unit configured to reduce the word-lengths of the digital words and a sigma-delta modulator coupled to the word-length adaption unit downstream thereof and configured to modulate the sequence of digital words having reduced word-lengths.