Fin cut process and fin structure
US10325813B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 9, 2017 |
| Grant date | Jun 18, 2019 |
| Priority date | — |
| Expiry date | Oct 9, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a semiconductor device includes providing a substrate structure including a substrate, semiconductor fins extending in a first direction on the substrate, a hardmask layer on the semiconductor fins, and an isolation region surrounding the semiconductor fins and having an upper surface flush with the hardmask layer, the isolation region including a first region on a side of the semiconductor fins in the first direction and a second region on a side of the semiconductor fins in a second direction different from the first direction. The method also includes removing the hardmask layer, etching a portion of the first region above the semiconductor fins, forming a mask layer on the semiconductor fins and a remaining first region, etching the second region such that an upper surface of the remaining second region is lower than an upper surface of the semiconductor fins, and removing the mask layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.