Locking a cache line for write operations on a bus
US10331568B2 · kind B2 · utility
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24References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 25, 2018 |
| Grant date | Jun 25, 2019 |
| Priority date | — |
| Expiry date | May 25, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/657
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are a computer program product, system, and method for locking a cache line for a burst write operations on a bus. A cache line is allocated in a cache for a target address. A lock is set for the cache line, wherein setting the lock prevents the data in the cache line from being cast out. Data is written to the cache line. All the data in the cache line is flushed to the target address over a bus in response to completing writing to the cache line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.