Semiconductor package with integrated harmonic termination feature
US10332847B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2017 |
| Grant date | Jun 25, 2019 |
| Priority date | — |
| Expiry date | Jun 25, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/451
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a metal flange having a lower surface and an upper surface opposite the lower surface. An electrically insulating window frame is disposed on the upper surface of the flange. The electrically insulating window frame forms a ring around a periphery of the metal flange so as to expose the upper surface of the metal flange in a central die attach region. A first electrically conductive lead is disposed on the electrically insulating window frame and extends away from a first side of the metal flange. A second electrically conductive lead is disposed on the electrically insulating window frame and extends away from a second side of the metal flange, the second side being opposite the first side. A first harmonic filtering feature is formed on a portion of the electrically insulating window frame and is electrically connected to the first electrically conductive lead.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.