Method for producing contact areas on a semiconductor substrate
US10332850B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2014 |
| Grant date | Jun 25, 2019 |
| Priority date | — |
| Expiry date | Jun 24, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/16237
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided herein is a method for producing hollow contact areas for insertion bonding, formed on a semiconductor substrate comprising a stack of one or more metallization layers on a surface of the substrate. Openings are etched in a dielectric layer by plasma etching, using a resist layer as a mask. The resist layer and plasma etch parameters are chosen to obtain openings with sloped sidewalls having a pre-defined slope, due to controlled formation of a polymer layer forming on the sidewalls of the resist hole and the hollow contact opening formed during etching. According to a preferred embodiment, metal deposited in the hollow contact areas and on top of the dielectric layer is planarized using chemical mechanical polishing, leading to mutually isolated contact areas. The disclosure is also related to components obtainable by the method and to a semiconductor package comprising such components.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.