Integrating a gate-all-around (GAA) field-effect transistor(s) (FET(S)) and a finFET(s) on a common substrate of a semiconductor die
US10332881B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 17, 2018 |
| Grant date | Jun 25, 2019 |
| Priority date | — |
| Expiry date | Aug 17, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0149
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrating a gate-all-around (GAA) field-effect transistor(s) and a FinFET(s) on a common substrate of a semiconductor die is disclosed. GAA FETs and FinFETs can form integrated circuits (ICs). GAA FETs and FinFETs are integrated on a common substrate to optimize advantages of each type of FET. For example, FinFETs may be formed in the common substrate in the semiconductor die for forming circuits where reduced resistance and capacitance are important for performance, whereas GAA FETs may be formed in the common substrate in the semiconductor die for forming circuits with decreased threshold voltage to allow voltage scaling to lower supply voltages to reduce power consumption and also to reduce silicon area as a result of vertically stacked devices. This supports a designer having the freedom to separate control the channel width of the GAA FETs and FinFETs, which may be important for controlling drive strength and/or area for different circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.