FinFET semiconductor device
US10332884B2 · kind B2 · utility
10Cited by
7References
5Claims
0Family size
Assignee
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Key dates
| Filing date | Nov 2, 2017 |
| Grant date | Jun 25, 2019 |
| Priority date | — |
| Expiry date | Nov 2, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/696
Abstract
A method of manufacturing FinFET semiconductor devices in memory regions and logic regions includes the steps of forming a first gate material layer on a substrate and fins, patterning the first gate material layer to form a control gate, forming a second gate material layer on the substrate and fins, performing an etch process to the cell region so that the second gate material layer in the cell region is lower than the second gate material layer in the peripheral region, patterning the second gate material layer to form a select gate in the cell region and a dummy gate in the logic region respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.