Semiconductor device for wafer-scale integration
US10332931B2 · kind B2 · utility
0Cited by
3References
5Claims
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Key dates
| Filing date | Mar 9, 2017 |
| Grant date | Jun 25, 2019 |
| Priority date | — |
| Expiry date | Mar 15, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/37001
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The semiconductor device comprises a semiconductor wafer with an integrated circuit, formed by a plurality of dies, a further semiconductor wafer, which differs from the semiconductor wafer in diameter and semiconductor material, the semiconductor wafer and the further semiconductor wafer being bonded to one another by means of a bonding layer, and an electrically conductive contact layer arranged on the further semiconductor wafer opposite to the bonding layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.