Method and system for a compiler and decompiler
US10338902B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 26, 2018 |
| Grant date | Jul 2, 2019 |
| Priority date | — |
| Expiry date | Jun 26, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/53
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, system, and computer-readable medium including operations for optimizing computer code is disclosed. A block of mixed intermediate representation (MIR) code is received. A partially-decompiled block of computer code is generated from the MIR code. For each instruction in the block of MIR code, in reverse order, a native expression vector for the instruction is computed. A set of pattern-matching operations is repeated until no transformations occur. A fully-decompiled block of computer code is generated from the partially-decompiled block of computer code, the fully-decompiled block of computer code having a semantic level that is raised. The fully-decompiled block of computer code is provided for deployment on an architecture, the deployment including lowering the semantic of the computer code to a level that corresponds to a CPU or GPU supported by the architecture.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.