Interconnect structure including air gap
US10340181B2 · kind B2 · utility
2Cited by
0References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 17, 2016 |
| Grant date | Jul 2, 2019 |
| Priority date | — |
| Expiry date | Nov 17, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76852
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor structure is provided. A conductive layer is formed over a substrate. The conductive layer is selectively etched to form a first conductive portion, a second conductive portion, and a spacing between the first conductive portion and the second conductive portion. A dielectric layer is formed over the first conductive portion, the second conductive portion, and the spacing, such that an air gap is formed in the spacing between the first and second conductive portions and is sealed by the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.