Patent · US Active

FinFET gate structure and method for fabricating the same

US10340192B2 · kind B2 · utility

3Cited by
4References
20Claims
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Key dates

Filing dateNov 15, 2017
Grant dateJul 2, 2019
Priority date
Expiry dateNov 15, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/0177
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor device includes a n-type gate structure over a first semiconductor fin, in which the n-type gate structure is fluorine incorporated and includes a n-type work function metal layer overlying the first high-k dielectric layer. The n-type work function metal layer includes a TiAl (titanium aluminum) alloy, in which an atom ratio of Ti (titanium) to Al (aluminum) is in a range substantially from 1 to 3. The semiconductor device further includes a p-type gate structure over a second semiconductor fin, in which the p-type gate structure is fluorine incorporated includes a p-type work function metal layer overlying the second high-k dielectric layer. The p-type work function metal layer includes titanium nitride (TiN), in which an atom ratio of Ti to N (nitrogen) is in a range substantially from 1:0.9 to 1:1.1.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.