Semiconductor structure and fabrication method thereof
US10340271B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 17, 2017 |
| Grant date | Jul 2, 2019 |
| Priority date | — |
| Expiry date | Aug 23, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31144
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor structures and fabrication methods thereof are provided. An exemplary fabrication method includes providing a semiconductor substrate having a first region, a second region and an isolation region between the first region and the second region; forming a plurality of first fins on the semiconductor substrate in the first region and a plurality of second fins on the semiconductor substrate in the second region; forming an isolation structure, covering portions of side surfaces of the first fins and the second fins and with a top surface below the top surfaces of the first fins and the second fins, over the semiconductor substrate; and forming an isolation layer over the isolation structure in the isolation region and with a top surface coplanar or above the top surfaces of the first fins and the second fins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.