Patent · US Active

Semiconductor structure and fabrication method thereof

US10347578B2 · kind B2 · utility

1Cited by
1References
17Claims
0Family size

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Key dates

Filing dateAug 10, 2017
Grant dateJul 9, 2019
Priority date
Expiry dateAug 10, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L23/5226
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor structure and a method for fabricating the semiconductor structure are provided. The method includes providing a base substrate including a device region and a peripheral region. The base substrate includes a base interconnection structure. The method also includes forming a medium layer on the base substrate. In addition, the method includes forming a first trench having a first depth in the peripheral region, and forming a second trench having a second depth in the device region. The second depth is greater than the first depth. Moreover, the method includes forming a first opening in the device region and forming a second opening in the peripheral region. Further, the method includes forming a first interconnection structure by filling the first opening with a conductive material and forming a second interconnection structure by filling the second opening with the conductive material.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.