High power gallium nitride electronics using miscut substrates
US10347736B2 · kind B2 · utility
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19Claims
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Key dates
| Filing date | Sep 6, 2017 |
| Grant date | Jul 9, 2019 |
| Priority date | — |
| Expiry date | Sep 6, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/115
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating an electronic device includes providing a III-V substrate having a hexagonal crystal structure and a normal to a growth surface characterized by a misorientation from the <0001> direction of between 0.15° and 0.65°. The method also includes growing a first III-V epitaxial layer coupled to the III-V substrate and growing a second III-V epitaxial layer coupled to the first III-V epitaxial layer. The method further includes forming a first contact in electrical contact with the III-V substrate and forming a second contact in electrical contact with the second III-V epitaxial layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.