Magnetic memory devices having conductive pillar structures including patterning residue components
US10347819B2 · kind B2 · utility
1Cited by
3References
15Claims
0Family size
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Key dates
| Filing date | Nov 1, 2016 |
| Grant date | Jul 9, 2019 |
| Priority date | — |
| Expiry date | Jul 1, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/85
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods of manufacturing a semiconductor device include forming a conductive layer on a substrate, forming an air gap or other cavity between the conductive layer and the substrate, and patterning the conductive layer to expose the air gap. The methods may further include forming conductive pillars between the substrate and the conductive layer. The air gap may be positioned between the conductive pillars.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.