Method and apparatus for clock skew control with low jitter in an integrated circuit

US10348278B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Andreas H. A. Arp · Nufringen, DE
• Fatih Cilek · Eppelheim, DE
• Andre Hertwig · Waldenbuch, DE
• Michael V. Koch · Ehningen, DE
• Matthias Ringe · Lörrach, DE

Key dates

• Filing date: Jul 17, 2018
• Grant date: Jul 9, 2019
• Expiry date: Jul 17, 2038

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F1/10
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

An apparatus of performing a clock skew adjustment between at least first and second clock signals includes first and second skew sensors and a skew controller. The first skew sensor receives a third clock signal obtained by delaying the first clock signal by a first delay and a fourth clock signal obtained by delaying the second clock signal by a second delay, and generates first information based on the third and fourth clock signals. The second skew sensor receives a fifth clock signal obtained by delaying the first clock signal by a third delay and a sixth clock signal obtained by delaying the second clock signal by a fourth delay, and generates second information based on the fifth and sixth clock signals. Each of the first and second information varies depending on the clock skew. The skew controller performs the clock skew adjustment based on the first and second information.