Matthias Ringe
46Patents
5h-index
18Co-inventors
62Inventor score
Filing activity: Jul 25, 2005 → Sep 7, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10326435B2 | Dynamic control of edge shift for duty cycle correction | Electricity | 23 | Active |
| US8037441B2 | Gridded-router based wiring on a non-gridded library | Physics | 14 | Active |
| US10063222B1 | Dynamic control of edge shift for duty cycle correction | Electricity | 13 | Active |
| US7865855B2 | Method and system for generating a layout for an integrated electronic circuit | Physics | 8 | Active |
| US7526743B2 | Method for routing data paths in a semiconductor chip with a plurality of layers | Physics | 8 | Active |
| US10148259B1 | Skew sensor with enhanced reliability | Electricity | 5 | Active |
| US7844931B2 | Method and computer system for optimizing the signal time behavior of an electronic circuit design | Physics | 4 | Active |
| US8566771B1 | Automation of interconnect and routing customization | Physics | 4 | Active |
| US10564664B2 | Integrated skew control | Electricity | 3 | Active |
| US9306547B2 | Duty cycle adjustment with error resiliency | Electricity | 3 | Active |
| US10175297B2 | Measuring a slew rate on-chip | Physics | 3 | Active |
| US11163002B2 | Burn-in resilient integrated circuit for processors | Electricity | 2 | Active |
| US10348279B2 | Skew control | Electricity | 2 | Active |
| US9916409B2 | Generating a layout for an integrated circuit | Physics | 1 | Active |
| US10684642B2 | Adaptive clock mesh wiring | Physics | 1 | Active |
| US7886245B2 | Structure for optimizing the signal time behavior of an electronic circuit design | Physics | 1 | Active |
| US10110205B2 | Method and apparatus for clock skew control with low jitter in an integrated circuit | Physics | 1 | Active |
| US8937494B1 | Method and apparatus for detecting rising and falling transitions of internal signals of an integrated circuit | Electricity | 1 | Active |
| US10158351B1 | Skew control apparatus and algorithm using a low pass filter | Electricity | 1 | Active |
| US8912824B1 | Method and apparatus for detecting rising and falling transitions of internal signals of an integrated circuit | Electricity | 1 | Active |
| US10348278B2 | Method and apparatus for clock skew control with low jitter in an integrated circuit | Physics | 1 | Active |
| US10355683B2 | Correcting duty cycle and compensating for active clock edge shift | Electricity | 1 | Active |
| US8522187B2 | Method and data processing system to optimize performance of an electric circuit design, data processing program and computer program product | Physics | 1 | Active |
| US11022998B2 | Optimally driving non-uniform clock mesh loads | Physics | 1 | Active |
| US11256284B2 | Integrated skew control | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.