Patent · US Active

Accelerated data copyback

US10353775B1 · kind B1 · utility

2Cited by
1References
11Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 3, 2015
Grant dateJul 16, 2019
Priority date
Expiry dateAug 3, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M13/09
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A single instruction is received to read a read address in storage in order to obtain read data and write the read data to a write address in the storage. Error correction decoding is performed in order to obtain user data. Error correction parity information is generated based at least in part on (1) the user data and (2) new metadata associated with the write address, without buffering the user data between the error correction decoding and the generation of the error correction parity information. The user data, the new metadata, and the error correction parity information are stored in the write address in the storage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.