Power semiconductor device

US10355116B2 · kind B2 · utility

Assignee

• Infineon Technologies Austria AG · AT

Inventors

• Markus Bina · Sauerlach, DE
• Thomas Basler · Riemerling, DE
• Matteo Dainese · Munich, DE
• Hans-Joachim Schulze · Taufkirchen, DE

Key dates

• Filing date: Mar 20, 2018
• Grant date: Jul 16, 2019
• Expiry date: Mar 20, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/83

Abstract

A power semiconductor device includes: a semiconductor body coupled to a first load terminal and a second load terminal, and includes: a first doped region of a second conductivity type electrically connected to the first load terminal; a recombination zone arranged at least within the first doped region; an emitter region of the second conductivity type electrically connected to the second load terminal; and a drift region of a first conductivity type arranged between the first doped region and the emitter region. The drift region and the first doped region enable the power semiconductor device to operate in: a conducting state during which a load current between the load terminals is conducted along a forward direction; in a forward blocking state during which a forward voltage applied between the load terminals is blocked; and in a reverse blocking state during which a reverse voltage applied between the terminals is blocked.