Nonvolatile memory device and operating method thereof
US10359950B2 · kind B2 · utility
1Cited by
1References
23Claims
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Key dates
| Filing date | Sep 26, 2017 |
| Grant date | Jul 23, 2019 |
| Priority date | — |
| Expiry date | Sep 26, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device may include a memory cell array having a plurality of memory cells, and a controller suitable for reading data of a memory cell corresponding to an address of write data, among the memory cells, and comparing the write data and the read data to check specific bits different from corresponding bits of the read data, among a plurality of bits of the write data, according to a write operation request. The controller may output a check result to outside after a preset time from the write operation request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.