Internal spacers for nanowire semiconductor devices

US10361268B2 · kind B2 · utility

Assignee

• IMEC VZW · BE

Inventors

• Kurt Wostyn · Holsbeek, BE
• Hans Mertens · Leuven, NL
• Liesbeth Witters · Linden, BE
• Andriy Hikavyy · Leuven, BE
• Naoto Horiguchi · Leuven, BE

Key dates

• Filing date: Feb 28, 2018
• Grant date: Jul 23, 2019
• Expiry date: Feb 28, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/31116
• WIPO field: Micro-structural and nano-technology
• WIPO sector: Chemistry

Abstract

A method of forming an internal spacer between nanowires, the method involving: providing a fin comprising a stack of layers of sacrificial material alternated with nanowire material, and selectively removing part of the sacrificial material, thereby forming a recess. The method also involves depositing dielectric material into the recess resulting in dielectric material within the recess and excess dielectric material outside the recess, where a crevice remains in the dielectric material in each recess, and removing the excess dielectric material using a first etchant. The method also involves enlarging the crevices to form a gap using a second etchant such that a remaining dielectric material still covers the sacrificial material and partly covers the nanowire material, and such that outer ends of the nanowire material are accessible; and growing electrode material on the outer ends such that the electrode material from neighboring outer ends merge, thereby covering the gap.