Patterning of graphene circuits on flexible substrates
US10362680B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 14, 2018 |
| Grant date | Jul 23, 2019 |
| Priority date | — |
| Expiry date | May 14, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1545
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A process for forming a graphene circuit pattern on an object is described. A graphene layer is grown on a metal foil. A bonding layer is formed on a protective film and a surface of the bonding layer is roughened. The graphene layer is transferred onto the roughened surface of the bonding layer. The protective film is removed and the bonding layer is laminated to a first core dielectric substrate. The metal foil is etched away. Thereafter the graphene layer is etched using oxygen plasma etching to form graphene circuits on the first core dielectric substrate. The first core dielectric substrate having graphene circuits thereon is bonded together with a second core dielectric substrate wherein the graphene circuits are on a side facing the second core dielectric substrate wherein an air gap is left there between.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.