Standard cell architecture for diffusion based on fin count
US10366196B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2017 |
| Grant date | Jul 30, 2019 |
| Priority date | — |
| Expiry date | Jan 17, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed systems and methods pertain to finfet based integrated circuits designed with logic cell architectures which support multiple diffusion regions for n-type and p-type diffusions. Different diffusion regions of each logic cell can have different widths or fin counts. Abutting two logic cells is enabled based on like fin counts for corresponding p-diffusion regions and n-diffusion regions of the two logic cells. Diffusion fills are used at common edges between the two logic cells for extending lengths of diffusion, based on the like fin counts. The logic cell architectures support via redundancy and the ability to selectively control threshold voltages of different logic cells with implant tailoring. Half-row height cells can be interleaved with standard full-row height cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.