Multi-level cell solid state device and method for transferring data between a host and the multi-level cell solid state device
US10372342B2 · kind B2 · utility
6Cited by
0References
18Claims
0Family size
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Key dates
| Filing date | Oct 2, 2017 |
| Grant date | Aug 6, 2019 |
| Priority date | — |
| Expiry date | Oct 2, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7203
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for storing data in a multi-level cell (MLC) flash memory are disclosed. One such data storage system has a data path with cascaded data access performance, including multiple storage portions having different data access speeds. A cascaded data path enables flash memory data access that has a more graceful degradation instead of an abrupt decrease in performance during operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.