Inventor · San Jose, CA, US

Gautam Dusija

56Patents
11h-index
62Co-inventors
77Inventor score

Filing activity: Dec 18, 2009 → Aug 9, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US8886877B1 In-situ block folding for nonvolatile memory Physics 44 Active
US8054684B2 Non-volatile memory and method with atomic program sequence and write abort detection Physics 39 Active
US9785357B2 Systems and methods for sampling data at a non-volatile memory system Physics 29 Active
US8913431B1 Pseudo block operation mode in 3D NAND Physics 22 Active
US8902661B1 Block structure profiling in three dimensional memory Electricity 20 Active
US8423866B2 Non-volatile memory and method with post-write read and adaptive re-write to manage errors Physics 15 Active
US8725935B2 Balanced performance for on-chip folding of non-volatile memories Physics 15 Active
US8902647B1 Write scheme for charge trapping memory Physics 12 Active
US8902658B1 Three-dimensional NAND memory with adaptive erase Physics 12 Active
US9105349B2 Adaptive operation of three dimensional memory Physics 11 Active
US8966330B1 Bad block reconfiguration in nonvolatile memory Physics 11 Active
US9384839B2 Write sequence providing write abort protection Physics 11 Active
US8964467B1 Systems and methods for partial page programming of multi level cells Physics 10 Active
US9015407B1 String dependent parameter setup Physics 10 Active
US9484098B1 Smart reread in nonvolatile memory Physics 9 Active
US9978456B2 Techniques for reducing read disturb in partially written blocks of non-volatile memory Physics 9 Active
US8972675B2 Efficient post write read in three dimensional nonvolatile memory Physics 9 Active
US9092363B2 Selection of data for redundancy calculation in three dimensional nonvolatile memory Physics 9 Active
US9240241B2 Pseudo block operation mode in 3D NAND Physics 8 Active
US9312026B2 Zoned erase verify in three dimensional nonvolatile memory Electricity 8 Active
US9646709B2 Proxy wordline stress for read disturb detection Physics 7 Active
US10372342B2 Multi-level cell solid state device and method for transferring data between a host and the multi-level cell solid state device Physics 6 Active
US9230656B2 System for maintaining back gate threshold voltage in three dimensional NAND memory Physics 6 Active
US9047974B2 Erased state reading Physics 6 Active
US8923054B1 Pseudo block operation mode in 3D NAND Physics 5 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.