Memory protecting unit and method for protecting a memory address space
US10372630B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 16, 2017 |
| Grant date | Aug 6, 2019 |
| Priority date | — |
| Expiry date | Oct 31, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/151
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory protector is configured to evaluate access requests referring to a memory address space. The access requests comprise address parameters referring to addresses of the memory address space. The memory protector comprises an address evaluator, an address results combiner, and a data register. The address evaluator is configured to evaluate whether the address parameters refer to address ranges of a set of address ranges and is configured to provide results regarding the address ranges. The address results combiner is configured to combine results provided by the address evaluator depending on access protection groups to which the address ranges are mapped to. The memory protector is configured to provide access grant results based on combinations provided by the address results combiner. The data register is configured to store data concerning the set of address ranges and concerning a mapping of the address ranges to the access protection groups.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.