FinFET with curved STI
US10373861B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 3, 2018 |
| Grant date | Aug 6, 2019 |
| Priority date | — |
| Expiry date | Jul 3, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a substrate having a plurality of fin structures thereon, an isolation oxide structure in the substrate between adjacent two of the plurality of fin structures, a gate disposed on the plurality of fin structures, a gate dielectric layer disposed between the plurality of fin structures and the gate, and a source/drain doped region in each of the plurality of fin structures. The isolation oxide structure has a concave, curved top surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.