Package structure and the method to fabricate thereof
US10373894B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2016 |
| Grant date | Aug 6, 2019 |
| Priority date | — |
| Expiry date | Oct 26, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49124
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention discloses a package structure made of the combination of a device carrier and a modifiable substrate. In one embodiment, a recess is formed in the device carrier and a conductive element is disposed on the substrate, wherein the substrate is disposed on the device carrier and the conductive element is located in the recess of the device carrier. The conductive pattern in the substrate is electrically connected to the device carrier and I/O terminals of the first conductive element. The invention also discloses a method for manufacturing a package structure made of the combination of a device carrier and a modifiable substrate. In one embodiment, a portion of the conductive pattern in the substrate can be modified.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.