Method and device for compound semiconductor fin structure

US10374065B2 · kind B2 · utility

Assignees

• Semiconductor Manufacturing International (Shanghai) Corporation · CN
• Semiconductor Manufacturing International (Beijing) Corporation · CN

Inventors

• Haiyang Zhang · Shanghai, CN
• Yan Wang · Shanghai, CN

Key dates

• Filing date: Mar 29, 2017
• Grant date: Aug 6, 2019
• Expiry date: Mar 29, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/215
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method of manufacturing a semiconductor device includes forming a first semiconductor layer on a substrate, forming a stack of semiconductor layer structures on the first semiconductor layer, and etching the stack to form a fin structure. Each of the semiconductor layer structures includes a first insulator layer and a second semiconductor layer on the first insulator layer. The first and second semiconductor layers have the same semiconductor compound. The fin structure according to the novel method includes one or more insulator layers to achieve a higher on current/off current ratio, thereby improving the device performance relative to conventional fin structures without the insulator layers.