Control gate dummy for word line uniformity and method for producing the same
US10381360B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2018 |
| Grant date | Aug 13, 2019 |
| Priority date | — |
| Expiry date | Mar 22, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6892
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a uniform WL over the MCEL region and resulting device are provided. Embodiments include providing a substrate having a MCEL region, a HV region and a logic region, separated by an isolation region; forming a plurality of CG stacks over the MCEL region, and a plurality of CG dummy stacks over the HV region and the logic region, respectively; forming first and second overlying polysilicon layers with a spacer therebetween, an EG and a WL on the MCEL region formed; planarizing the second polysilicon layer down to upper surface of the plurality of CG stacks and the plurality of CG dummy stacks; and removing portions of the second polysilicon layer in-between the plurality of CG stacks and around the plurality of CG dummy stacks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.